NMSIS-Core  Version 1.4.1
NMSIS-Core support for Nuclei processor-based devices
Modules
Here is a list of all modules:
[detail level 123]
 Version ControlVersion #define symbols for NMSIS release specific C/C++ source code
 Peripheral AccessNaming conventions and optional features for accessing peripherals
 Compiler ControlCompiler agnostic #define symbols for generic c/c++ source code
 ▼Core CSR EncodingsNMSIS Core CSR Encodings
 Core CSR RegistersNMSIS Core CSR Register Definitions
 NMSIS Bench and Test Related Helper FunctionsFunctions that used to do benchmark and test suite
 ▼Register Define and Type DefinitionsType definitions and defines for core registers
 Base Register Define and Type DefinitionsType definitions and defines for base core registers
 Register Define and Type Definitions Of ECLICType definitions and defines for eclic registers
 Register Define and Type Definitions Of PLICType definitions and defines for plic registers
 Register Define and Type Definitions Of System TimerType definitions and defines for system timer registers
 Core CSR Register AccessFunctions to access the Core CSR Registers
 Intrinsic Functions for CPU IntructionsFunctions that generate RISC-V CPU instructions
 Interrupts and ExceptionsFunctions that manage interrupts and exceptions via the ECLIC
 PLIC InterruptFunctions that manage interrupts via the PLIC
 ▼CIDU FunctionsFunctions that manage external interrupts, inter core interrupts and semaphores
 External Interrupt Distribution FunctionsFunctions that distribute external interrupts to cores
 Inter Core Interrupt FunctionsFunctions that implement Inter Core Interrupt mechanism
 Semaphore FunctionsFunctions that configure and use semaphoresSemaphore is very useful for multi-core cluster without SMP enable
 SysTimer FunctionsFunctions that configure the Core System Timer
 FPU FunctionsFunctions that related to the RISC-V FPU (F and D extension)
 Intrinsic Functions for Vector InstructionsFunctions that generate RISC-V Vector instructions
 Intrinsic Functions for Bitmanipulation InstructionsFunctions that generate RISC-V Bitmanipulation instructions
 ▼Intrinsic Functions for SIMD InstructionsFunctions that generate RISC-V DSP SIMD instructions
 ▼SIMD Data Processing InstructionsSIMD Data Processing Instructions
 SIMD 16-bit Add/Subtract InstructionsSIMD 16-bit Add/Subtract Instructions
 SIMD 8-bit Addition & Subtraction InstructionsSIMD 8-bit Addition & Subtraction Instructions
 SIMD 16-bit Shift InstructionsSIMD 16-bit Shift Instructions
 SIMD 8-bit Shift InstructionsSIMD 8-bit Shift Instructions
 SIMD 16-bit Compare InstructionsSIMD 16-bit Compare Instructions
 SIMD 8-bit Compare InstructionsSIMD 8-bit Compare Instructions
 SIMD 16-bit Multiply InstructionsSIMD 16-bit Multiply Instructions
 SIMD 8-bit Multiply InstructionsSIMD 8-bit Multiply Instructions
 SIMD 16-bit Miscellaneous InstructionsSIMD 16-bit Miscellaneous Instructions
 SIMD 8-bit Miscellaneous InstructionsSIMD 8-bit Miscellaneous Instructions
 SIMD 8-bit Unpacking InstructionsSIMD 8-bit Unpacking Instructions
 ▼Non-SIMD InstructionsNon-SIMD Instructions
 Non-SIMD Q15 saturation ALU InstructionsNon-SIMD Q15 saturation ALU Instructions
 Non-SIMD Q31 saturation ALU InstructionsNon-SIMD Q31 saturation ALU Instructions
 32-bit Computation Instructions32-bit Computation Instructions
 OV (Overflow) flag Set/Clear InstructionsOV (Overflow) flag Set/Clear Instructions
 Non-SIMD Miscellaneous InstructionsNon-SIMD Miscellaneous Instructions
 ▼Partial-SIMD Data Processing InstructionsPartial-SIMD Data Processing Instructions
 SIMD 16-bit Packing InstructionsSIMD 16-bit Packing Instructions
 Signed MSW 32x32 Multiply and Add InstructionsSigned MSW 32x32 Multiply and Add Instructions
 Signed MSW 32x16 Multiply and Add InstructionsSigned MSW 32x16 Multiply and Add Instructions
 Signed 16-bit Multiply 32-bit Add/Subtract InstructionsSigned 16-bit Multiply 32-bit Add/Subtract Instructions
 Signed 16-bit Multiply 64-bit Add/Subtract InstructionsSigned 16-bit Multiply 64-bit Add/Subtract Instructions
 Partial-SIMD Miscellaneous InstructionsPartial-SIMD Miscellaneous Instructions
 8-bit Multiply with 32-bit Add Instructions8-bit Multiply with 32-bit Add Instructions
 ▼64-bit Profile Instructions64-bit Profile Instructions
 64-bit Addition & Subtraction Instructions64-bit Addition & Subtraction Instructions
 32-bit Multiply with 64-bit Add/Subtract Instructions32-bit Multiply with 64-bit Add/Subtract Instructions
 Signed 16-bit Multiply 64-bit Add/Subtract InstructionsSigned 16-bit Multiply 64-bit Add/Subtract Instructions
 ▼RV64 Only InstructionsRV64 Only Instructions
 (RV64 Only) SIMD 32-bit Add/Subtract Instructions(RV64 Only) SIMD 32-bit Add/Subtract Instructions
 (RV64 Only) SIMD 32-bit Shift Instructions(RV64 Only) SIMD 32-bit Shift Instructions
 (RV64 Only) SIMD 32-bit Miscellaneous Instructions(RV64 Only) SIMD 32-bit Miscellaneous Instructions
 (RV64 Only) SIMD Q15 Saturating Multiply Instructions(RV64 Only) SIMD Q15 Saturating Multiply Instructions
 (RV64 Only) 32-bit Multiply Instructions(RV64 Only) 32-bit Multiply Instructions
 (RV64 Only) 32-bit Multiply & Add Instructions(RV64 Only) 32-bit Multiply & Add Instructions
 (RV64 Only) 32-bit Parallel Multiply & Add Instructions(RV64 Only) 32-bit Parallel Multiply & Add Instructions
 (RV64 Only) Non-SIMD 32-bit Shift Instructions(RV64 Only) Non-SIMD 32-bit Shift Instructions
 32-bit Packing Instructions32-bit Packing Instructions
 Nuclei Default SIMD DSP Additional Instructions(RV32 & RV64)Nuclei Customized DSP Instructions
 Nuclei N1 SIMD DSP Additional Instructions(RV32 only)Nuclei Customized N1 DSP Instructions
 Nuclei N2 SIMD DSP Additional Instructions(RV32 only)Nuclei Customized N2 DSP Instructions
 Nuclei N3 SIMD DSP Additional Instructions(RV32 only)Nuclei Customized N3 DSP Instructions
 PMP FunctionsFunctions that related to the RISCV Phyiscal Memory Protection
 sPMP or sMPU FunctionsFunctions that related to the RISCV supervisor-mode Phyiscal Memory Protection
 PMA FunctionsFunctions that set/disable/enable different attribute type(Device/Non-Cacheable/Cacheable) memory regions, or get region info
 ▼Cache FunctionsFunctions that configure Instruction and Data Cache
 I-Cache FunctionsFunctions that configure Instruction Cache
 D-Cache FunctionsFunctions that configure Data Cache
 ARM Compatiable FunctionsA few functions that compatiable with ARM CMSIS-Core
 ▼System Device ConfigurationFunctions for system and clock setup available in system_<device>.c
 Interrupt and Exception and NMI HandlingFunctions for interrupt, exception and nmi handle available in system_<device>.c