Functions to access the Core CSR Registers. More...

Macros
#define	__RV_CSR_SWAP(csr, val)
	CSR operation Macro for csrrw instruction. More...

#define	__RV_CSR_READ(csr)
	CSR operation Macro for csrr instruction. More...

#define	__RV_CSR_WRITE(csr, val)
	CSR operation Macro for csrw instruction. More...

#define	__RV_CSR_READ_SET(csr, val)
	CSR operation Macro for csrrs instruction. More...

#define	__RV_CSR_SET(csr, val)
	CSR operation Macro for csrs instruction. More...

#define	__RV_CSR_READ_CLEAR(csr, val)
	CSR operation Macro for csrrc instruction. More...

#define	__RV_CSR_CLEAR(csr, val)
	CSR operation Macro for csrc instruction. More...

Functions
__STATIC_FORCEINLINE void	__switch_mode (uint8_t mode, uintptr_t stack, void(*entry_point)(void))
	switch privilege from machine mode to others. More...

__STATIC_FORCEINLINE void	__enable_irq (void)
	Enable IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__disable_irq (void)
	Disable IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__enable_ext_irq (void)
	Enable External IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__disable_ext_irq (void)
	Disable External IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__enable_timer_irq (void)
	Enable Timer IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__disable_timer_irq (void)
	Disable Timer IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__enable_sw_irq (void)
	Enable software IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__disable_sw_irq (void)
	Disable software IRQ Interrupts. More...

__STATIC_FORCEINLINE void	__disable_core_irq (uint32_t irq)
	Disable Core IRQ Interrupt. More...

__STATIC_FORCEINLINE void	__enable_core_irq (uint32_t irq)
	Enable Core IRQ Interrupt. More...

__STATIC_FORCEINLINE uint32_t	__get_core_irq_pending (uint32_t irq)
	Get Core IRQ Interrupt Pending status. More...

__STATIC_FORCEINLINE void	__clear_core_irq_pending (uint32_t irq)
	Clear Core IRQ Interrupt Pending status. More...

__STATIC_FORCEINLINE void	__enable_irq_s (void)
	Enable IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__disable_irq_s (void)
	Disable IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__enable_ext_irq_s (void)
	Enable External IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__disable_ext_irq_s (void)
	Disable External IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__enable_timer_irq_s (void)
	Enable Timer IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__disable_timer_irq_s (void)
	Disable Timer IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__enable_sw_irq_s (void)
	Enable software IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__disable_sw_irq_s (void)
	Disable software IRQ Interrupts in supervisor mode. More...

__STATIC_FORCEINLINE void	__disable_core_irq_s (uint32_t irq)
	Disable Core IRQ Interrupt in supervisor mode. More...

__STATIC_FORCEINLINE void	__enable_core_irq_s (uint32_t irq)
	Enable Core IRQ Interrupt in supervisor mode. More...

__STATIC_FORCEINLINE uint32_t	__get_core_irq_pending_s (uint32_t irq)
	Get Core IRQ Interrupt Pending status in supervisor mode. More...

__STATIC_FORCEINLINE void	__clear_core_irq_pending_s (uint32_t irq)
	Clear Core IRQ Interrupt Pending status in supervisor mode. More...

__STATIC_FORCEINLINE uint64_t	__get_rv_cycle (void)
	Read whole 64 bits value of mcycle counter. More...

__STATIC_FORCEINLINE void	__set_rv_cycle (uint64_t cycle)
	Set whole 64 bits value of mcycle counter. More...

__STATIC_FORCEINLINE uint64_t	__get_rv_instret (void)
	Read whole 64 bits value of machine instruction-retired counter. More...

__STATIC_FORCEINLINE void	__set_rv_instret (uint64_t instret)
	Set whole 64 bits value of machine instruction-retired counter. More...

__STATIC_FORCEINLINE uint64_t	__get_rv_time (void)
	Read whole 64 bits value of real-time clock. More...

__STATIC_FORCEINLINE unsigned long	__get_cluster_id (void)
	Get cluster id of current cluster. More...

__STATIC_FORCEINLINE unsigned long	__get_hart_index (void)
	Get hart index of current cluster. More...

__STATIC_FORCEINLINE unsigned long	__get_hart_id (void)
	Get hart id of current cluster. More...

Detailed Description

Functions to access the Core CSR Registers.

The following functions or macros provide access to Core CSR registers.

Macro Definition Documentation

◆ __RV_CSR_CLEAR

#define __RV_CSR_CLEAR	(	csr,
		val
	)

CSR operation Macro for csrc instruction.

Set csr register to be csr_content & ~val

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
val	Mask value to be used wih csrc instruction

Definition at line 606 of file core_feature_base.h.

◆ __RV_CSR_READ

#define __RV_CSR_READ ( csr )

CSR operation Macro for csrr instruction.

Read the content of csr register to __v and return it

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS

Returns: the CSR register value

Definition at line 514 of file core_feature_base.h.

◆ __RV_CSR_READ_CLEAR

#define __RV_CSR_READ_CLEAR	(	csr,
		val
	)

CSR operation Macro for csrrc instruction.

Read the content of csr register to __v, then set csr register to be __v & ~val, then return __v

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
val	Mask value to be used wih csrrc instruction

Returns: the CSR register value before written

Definition at line 588 of file core_feature_base.h.

◆ __RV_CSR_READ_SET

#define __RV_CSR_READ_SET	(	csr,
		val
	)

CSR operation Macro for csrrs instruction.

Read the content of csr register to __v, then set csr register to be __v | val, then return __v

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
val	Mask value to be used wih csrrs instruction

Returns: the CSR register value before written

Definition at line 551 of file core_feature_base.h.

◆ __RV_CSR_SET

#define __RV_CSR_SET	(	csr,
		val
	)

CSR operation Macro for csrs instruction.

Set csr register to be csr_content | val

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
val	Mask value to be used wih csrs instruction

Definition at line 569 of file core_feature_base.h.

◆ __RV_CSR_SWAP

#define __RV_CSR_SWAP	(	csr,
		val
	)

CSR operation Macro for csrrw instruction.

Read the content of csr register to __v, then write content of val into csr register, then return __v

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
val	value to store into the CSR register

Returns: the CSR register value before written

Definition at line 496 of file core_feature_base.h.

◆ __RV_CSR_WRITE

#define __RV_CSR_WRITE	(	csr,
		val
	)

CSR operation Macro for csrw instruction.

Write the content of val to csr register

Parameters

csr	CSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
val	value to store into the CSR register

Definition at line 532 of file core_feature_base.h.

Function Documentation

◆ __clear_core_irq_pending()

__STATIC_FORCEINLINE void __clear_core_irq_pending ( uint32_t irq )

Clear Core IRQ Interrupt Pending status.

Clear Core IRQ interrupt pending status of irq bit.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 787 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MIP, 1 << irq);
 }

References __RV_CSR_SET, and CSR_MIP.

◆ __clear_core_irq_pending_s()

__STATIC_FORCEINLINE void __clear_core_irq_pending_s ( uint32_t irq )

Clear Core IRQ Interrupt Pending status in supervisor mode.

Clear Core IRQ interrupt pending status of irq bit.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 919 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_SIP, 1 << irq);
 }

References __RV_CSR_SET, and CSR_SIP.

◆ __disable_core_irq()

__STATIC_FORCEINLINE void __disable_core_irq ( uint32_t irq )

Disable Core IRQ Interrupt.

Disable Core IRQ interrupt by clearing the irq bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 754 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_MIE, 1 << irq);
 }

References __RV_CSR_CLEAR, and CSR_MIE.

◆ __disable_core_irq_s()

__STATIC_FORCEINLINE void __disable_core_irq_s ( uint32_t irq )

Disable Core IRQ Interrupt in supervisor mode.

Disable Core IRQ interrupt by clearing the irq bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 886 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_SIE, 1 << irq);
 }

References __RV_CSR_CLEAR, and CSR_SIE.

◆ __disable_ext_irq()

__STATIC_FORCEINLINE void __disable_ext_irq ( void )

Disable External IRQ Interrupts.

Disables External IRQ interrupts by clearing the MEIE-bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 699 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_MIE, MIE_MEIE);
 }

References __RV_CSR_CLEAR, CSR_MIE, and MIE_MEIE.

◆ __disable_ext_irq_s()

__STATIC_FORCEINLINE void __disable_ext_irq_s ( void )

Disable External IRQ Interrupts in supervisor mode.

Disables External IRQ interrupts by clearing the SEIE-bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 831 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_SIE, MIE_SEIE);
 }

References __RV_CSR_CLEAR, CSR_SIE, and MIE_SEIE.

◆ __disable_irq()

__STATIC_FORCEINLINE void __disable_irq ( void )

Disable IRQ Interrupts.

Disables IRQ interrupts by clearing the MIE-bit in the MSTATUS Register.

Remarks: Can only be executed in Privileged modes.

Definition at line 677 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_MSTATUS, MSTATUS_MIE);
 }

References __RV_CSR_CLEAR, CSR_MSTATUS, and MSTATUS_MIE.

◆ __disable_irq_s()

__STATIC_FORCEINLINE void __disable_irq_s ( void )

Disable IRQ Interrupts in supervisor mode.

Disables IRQ interrupts by clearing the SIE-bit in the SSTATUS Register.

Remarks: Can only be executed in Privileged modes.

Definition at line 809 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_SSTATUS, SSTATUS_SIE);
 }

References __RV_CSR_CLEAR, CSR_SSTATUS, and SSTATUS_SIE.

◆ __disable_sw_irq()

__STATIC_FORCEINLINE void __disable_sw_irq ( void )

Disable software IRQ Interrupts.

Disables software IRQ interrupts by clearing the MSIE-bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 743 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_MIE, MIE_MSIE);
 }

References __RV_CSR_CLEAR, CSR_MIE, and MIE_MSIE.

◆ __disable_sw_irq_s()

__STATIC_FORCEINLINE void __disable_sw_irq_s ( void )

Disable software IRQ Interrupts in supervisor mode.

Disables software IRQ interrupts by clearing the SSIE-bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 875 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_SIE, MIE_SSIE);
 }

References __RV_CSR_CLEAR, CSR_SIE, and MIE_SSIE.

◆ __disable_timer_irq()

__STATIC_FORCEINLINE void __disable_timer_irq ( void )

Disable Timer IRQ Interrupts.

Disables Timer IRQ interrupts by clearing the MTIE-bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 721 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_MIE, MIE_MTIE);
 }

References __RV_CSR_CLEAR, CSR_MIE, and MIE_MTIE.

◆ __disable_timer_irq_s()

__STATIC_FORCEINLINE void __disable_timer_irq_s ( void )

Disable Timer IRQ Interrupts in supervisor mode.

Disables Timer IRQ interrupts by clearing the STIE-bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 853 of file core_feature_base.h.

 {
     __RV_CSR_CLEAR(CSR_SIE, MIE_STIE);
 }

References __RV_CSR_CLEAR, CSR_SIE, and MIE_STIE.

◆ __enable_core_irq()

__STATIC_FORCEINLINE void __enable_core_irq ( uint32_t irq )

Enable Core IRQ Interrupt.

Enable Core IRQ interrupt by setting the irq bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 765 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MIE, 1 << irq);
 }

References __RV_CSR_SET, and CSR_MIE.

◆ __enable_core_irq_s()

__STATIC_FORCEINLINE void __enable_core_irq_s ( uint32_t irq )

Enable Core IRQ Interrupt in supervisor mode.

Enable Core IRQ interrupt by setting the irq bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 897 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_SIE, 1 << irq);
 }

References __RV_CSR_SET, and CSR_SIE.

◆ __enable_ext_irq()

__STATIC_FORCEINLINE void __enable_ext_irq ( void )

Enable External IRQ Interrupts.

Enables External IRQ interrupts by setting the MEIE-bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 688 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MIE, MIE_MEIE);
 }

References __RV_CSR_SET, CSR_MIE, and MIE_MEIE.

◆ __enable_ext_irq_s()

__STATIC_FORCEINLINE void __enable_ext_irq_s ( void )

Enable External IRQ Interrupts in supervisor mode.

Enables External IRQ interrupts by setting the SEIE-bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 820 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_SIE, MIE_SEIE);
 }

References __RV_CSR_SET, CSR_SIE, and MIE_SEIE.

◆ __enable_irq()

__STATIC_FORCEINLINE void __enable_irq ( void )

Enable IRQ Interrupts.

Enables IRQ interrupts by setting the MIE-bit in the MSTATUS Register.

Remarks: Can only be executed in Privileged modes.

Definition at line 666 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MSTATUS, MSTATUS_MIE);
 }

References __RV_CSR_SET, CSR_MSTATUS, and MSTATUS_MIE.

◆ __enable_irq_s()

__STATIC_FORCEINLINE void __enable_irq_s ( void )

Enable IRQ Interrupts in supervisor mode.

Enables IRQ interrupts by setting the SIE-bit in the SSTATUS Register.

Remarks: Can only be executed in Privileged modes.

Definition at line 798 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_SSTATUS, SSTATUS_SIE);
 }

References __RV_CSR_SET, CSR_SSTATUS, and SSTATUS_SIE.

◆ __enable_sw_irq()

__STATIC_FORCEINLINE void __enable_sw_irq ( void )

Enable software IRQ Interrupts.

Enables software IRQ interrupts by setting the MSIE-bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 732 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MIE, MIE_MSIE);
 }

References __RV_CSR_SET, CSR_MIE, and MIE_MSIE.

◆ __enable_sw_irq_s()

__STATIC_FORCEINLINE void __enable_sw_irq_s ( void )

Enable software IRQ Interrupts in supervisor mode.

Enables software IRQ interrupts by setting the SSIE-bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 864 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MIE, MIE_SSIE);
 }

References __RV_CSR_SET, CSR_MIE, and MIE_SSIE.

◆ __enable_timer_irq()

__STATIC_FORCEINLINE void __enable_timer_irq ( void )

Enable Timer IRQ Interrupts.

Enables Timer IRQ interrupts by setting the MTIE-bit in the MIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 710 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_MIE, MIE_MTIE);
 }

References __RV_CSR_SET, CSR_MIE, and MIE_MTIE.

◆ __enable_timer_irq_s()

__STATIC_FORCEINLINE void __enable_timer_irq_s ( void )

Enable Timer IRQ Interrupts in supervisor mode.

Enables Timer IRQ interrupts by setting the STIE-bit in the SIE Register.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 842 of file core_feature_base.h.

 {
     __RV_CSR_SET(CSR_SIE, MIE_STIE);
 }

References __RV_CSR_SET, CSR_SIE, and MIE_STIE.

◆ __get_cluster_id()

__STATIC_FORCEINLINE unsigned long __get_cluster_id ( void )

Get cluster id of current cluster.

This function will get cluster id of current cluster in a multiple cluster system

Returns: The cluster id of current cluster

Remarks: mhartid bit 15-8 is designed for cluster id in nuclei subsystem reference design

Attention: function is allowed in machine mode only

Definition at line 1047 of file core_feature_base.h.

 {
     unsigned long id;
  
     id = (__RV_CSR_READ(CSR_MHARTID) >> 8) & 0xFF;
     return id;
 }

References __RV_CSR_READ, and CSR_MHARTID.

◆ __get_core_irq_pending()

__STATIC_FORCEINLINE uint32_t __get_core_irq_pending ( uint32_t irq )

Get Core IRQ Interrupt Pending status.

Get Core IRQ interrupt pending status of irq bit.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 776 of file core_feature_base.h.

 {
     return ((__RV_CSR_READ(CSR_MIP) >> irq) & 0x1);
 }

References __RV_CSR_READ, and CSR_MIP.

◆ __get_core_irq_pending_s()

__STATIC_FORCEINLINE uint32_t __get_core_irq_pending_s ( uint32_t irq )

Get Core IRQ Interrupt Pending status in supervisor mode.

Get Core IRQ interrupt pending status of irq bit.

Remarks: Can only be executed in Privileged modes, available for plic interrupt mode.

Definition at line 908 of file core_feature_base.h.

 {
     return ((__RV_CSR_READ(CSR_SIP) >> irq) & 0x1);
 }

References __RV_CSR_READ, and CSR_SIP.

◆ __get_hart_id()

__STATIC_FORCEINLINE unsigned long __get_hart_id ( void )

Get hart id of current cluster.

This function will get hart id of current cluster in a multiple cluster system

Returns: The hart id of current cluster

Remarks: it will return full hartid not part of it for reference subsystem design, if your reference subsystem design has hartid offset, please define __HARTID_OFFSET in <Device>.h

Attention: function is allowed in machine mode only

Definition at line 1083 of file core_feature_base.h.

 {
     unsigned long id;
     id = __RV_CSR_READ(CSR_MHARTID);
     return id;
 }

References __RV_CSR_READ, and CSR_MHARTID.

◆ __get_hart_index()

__STATIC_FORCEINLINE unsigned long __get_hart_index ( void )

Get hart index of current cluster.

This function will get hart index of current cluster in a multiple cluster system, hart index is hartid - hartid offset, for example if your hartid is 1, and offset is 1, then hart index is 0

Returns: The hart index of current cluster

Attention: function is allowed in machine mode only

Definition at line 1063 of file core_feature_base.h.

 {
     unsigned long id;
 #ifdef __HARTID_OFFSET
     id = __RV_CSR_READ(CSR_MHARTID) - __HARTID_OFFSET;
 #else
     id = __RV_CSR_READ(CSR_MHARTID);
 #endif
     return id;
 }

References __RV_CSR_READ, and CSR_MHARTID.

◆ __get_rv_cycle()

__STATIC_FORCEINLINE uint64_t __get_rv_cycle ( void )

Read whole 64 bits value of mcycle counter.

This function will read the whole 64 bits of MCYCLE register

Returns: The whole 64 bits value of MCYCLE

Remarks: It will work for both RV32 and RV64 to get full 64bits value of MCYCLE

Definition at line 930 of file core_feature_base.h.

 {
 #if __RISCV_XLEN == 32
     volatile uint32_t high0, low, high;
     uint64_t full;
  
     high0 = __RV_CSR_READ(CSR_MCYCLEH);
     low = __RV_CSR_READ(CSR_MCYCLE);
     high = __RV_CSR_READ(CSR_MCYCLEH);
     if (high0 != high) {
         low = __RV_CSR_READ(CSR_MCYCLE);
     }
     full = (((uint64_t)high) << 32) | low;
     return full;
 #elif __RISCV_XLEN == 64
     return (uint64_t)__RV_CSR_READ(CSR_MCYCLE);
 #else // TODO Need cover for XLEN=128 case in future
     return (uint64_t)__RV_CSR_READ(CSR_MCYCLE);
 #endif
 }

References __RV_CSR_READ, CSR_MCYCLE, and CSR_MCYCLEH.

Referenced by __get_hpm_counter().

◆ __get_rv_instret()

__STATIC_FORCEINLINE uint64_t __get_rv_instret ( void )

Read whole 64 bits value of machine instruction-retired counter.

This function will read the whole 64 bits of MINSTRET register

Returns: The whole 64 bits value of MINSTRET

Remarks: It will work for both RV32 and RV64 to get full 64bits value of MINSTRET

Definition at line 974 of file core_feature_base.h.

 {
 #if __RISCV_XLEN == 32
     volatile uint32_t high0, low, high;
     uint64_t full;
  
     high0 = __RV_CSR_READ(CSR_MINSTRETH);
     low = __RV_CSR_READ(CSR_MINSTRET);
     high = __RV_CSR_READ(CSR_MINSTRETH);
     if (high0 != high) {
         low = __RV_CSR_READ(CSR_MINSTRET);
     }
     full = (((uint64_t)high) << 32) | low;
     return full;
 #elif __RISCV_XLEN == 64
     return (uint64_t)__RV_CSR_READ(CSR_MINSTRET);
 #else // TODO Need cover for XLEN=128 case in future
     return (uint64_t)__RV_CSR_READ(CSR_MINSTRET);
 #endif
 }

References __RV_CSR_READ, CSR_MINSTRET, and CSR_MINSTRETH.

Referenced by __get_hpm_counter().

◆ __get_rv_time()

__STATIC_FORCEINLINE uint64_t __get_rv_time ( void )

Read whole 64 bits value of real-time clock.

This function will read the whole 64 bits of TIME register

Returns: The whole 64 bits value of TIME CSR

Remarks: It will work for both RV32 and RV64 to get full 64bits value of TIME

Attention: only available when user mode available

Definition at line 1019 of file core_feature_base.h.

 {
 #if __RISCV_XLEN == 32
     volatile uint32_t high0, low, high;
     uint64_t full;
  
     high0 = __RV_CSR_READ(CSR_TIMEH);
     low = __RV_CSR_READ(CSR_TIME);
     high = __RV_CSR_READ(CSR_TIMEH);
     if (high0 != high) {
         low = __RV_CSR_READ(CSR_TIME);
     }
     full = (((uint64_t)high) << 32) | low;
     return full;
 #elif __RISCV_XLEN == 64
     return (uint64_t)__RV_CSR_READ(CSR_TIME);
 #else // TODO Need cover for XLEN=128 case in future
     return (uint64_t)__RV_CSR_READ(CSR_TIME);
 #endif
 }

References __RV_CSR_READ, CSR_TIME, and CSR_TIMEH.

◆ __set_rv_cycle()

__STATIC_FORCEINLINE void __set_rv_cycle ( uint64_t cycle )

Set whole 64 bits value of mcycle counter.

This function will set the whole 64 bits of MCYCLE register

Remarks: It will work for both RV32 and RV64 to set full 64bits value of MCYCLE

Definition at line 956 of file core_feature_base.h.

 {
 #if __RISCV_XLEN == 32
     __RV_CSR_WRITE(CSR_MCYCLE, 0); // prevent carry
     __RV_CSR_WRITE(CSR_MCYCLEH, (uint32_t)(cycle >> 32));
     __RV_CSR_WRITE(CSR_MCYCLE, (uint32_t)(cycle));
 #elif __RISCV_XLEN == 64
     __RV_CSR_WRITE(CSR_MCYCLE, cycle);
 #else // TODO Need cover for XLEN=128 case in future
 #endif
 }

References __RV_CSR_WRITE, CSR_MCYCLE, and CSR_MCYCLEH.

◆ __set_rv_instret()

__STATIC_FORCEINLINE void __set_rv_instret ( uint64_t instret )

Set whole 64 bits value of machine instruction-retired counter.

This function will set the whole 64 bits of MINSTRET register

Remarks: It will work for both RV32 and RV64 to set full 64bits value of MINSTRET

Definition at line 1000 of file core_feature_base.h.

 {
 #if __RISCV_XLEN == 32
     __RV_CSR_WRITE(CSR_MINSTRET, 0); // prevent carry
     __RV_CSR_WRITE(CSR_MINSTRETH, (uint32_t)(instret >> 32));
     __RV_CSR_WRITE(CSR_MINSTRET, (uint32_t)(instret));
 #elif __RISCV_XLEN == 64
     __RV_CSR_WRITE(CSR_MINSTRET, instret);
 #else // TODO Need cover for XLEN=128 case in future
 #endif
 }

References __RV_CSR_WRITE, CSR_MINSTRET, and CSR_MINSTRETH.

◆ __switch_mode()

__STATIC_FORCEINLINE void __switch_mode	(	uint8_t	mode,
		uintptr_t	stack,
		void(*)(void)	entry_point
	)

switch privilege from machine mode to others.

Execute into entry_point in mode(supervisor or user) with given stack

Parameters

mode	privilege mode
stack	predefined stack, size should set enough
entry_point	a function pointer to execute

Definition at line 638 of file core_feature_base.h.

 {
     unsigned long val = 0;
  
     /* Set MPP to the requested privilege mode */
     val = __RV_CSR_READ(CSR_MSTATUS);
     val = __RV_INSERT_FIELD(val, MSTATUS_MPP, mode);
  
     /* Set previous MIE disabled */
     val = __RV_INSERT_FIELD(val, MSTATUS_MPIE, 0);
  
     __RV_CSR_WRITE(CSR_MSTATUS, val);
  
     /* Set the entry point in MEPC */
     __RV_CSR_WRITE(CSR_MEPC, (unsigned long)entry_point);
  
     /* Set the register file */
     __ASM volatile("mv sp, %0" ::"r"(stack));
  
     __ASM volatile("mret");
 }

References __ASM, __RV_CSR_READ, __RV_CSR_WRITE, CSR_MEPC, CSR_MSTATUS, MSTATUS_MPIE, and MSTATUS_MPP.

Macros

Functions

Detailed Description

Macro Definition Documentation

◆ __RV_CSR_CLEAR

◆ __RV_CSR_READ

◆ __RV_CSR_READ_CLEAR

◆ __RV_CSR_READ_SET

◆ __RV_CSR_SET

◆ __RV_CSR_SWAP

◆ __RV_CSR_WRITE

Function Documentation

◆ __clear_core_irq_pending()

◆ __clear_core_irq_pending_s()

◆ __disable_core_irq()

◆ __disable_core_irq_s()

◆ __disable_ext_irq()

◆ __disable_ext_irq_s()

◆ __disable_irq()

◆ __disable_irq_s()

◆ __disable_sw_irq()

◆ __disable_sw_irq_s()

◆ __disable_timer_irq()

◆ __disable_timer_irq_s()

◆ __enable_core_irq()

◆ __enable_core_irq_s()

◆ __enable_ext_irq()

◆ __enable_ext_irq_s()

◆ __enable_irq()

◆ __enable_irq_s()

◆ __enable_sw_irq()

◆ __enable_sw_irq_s()

◆ __enable_timer_irq()

◆ __enable_timer_irq_s()

◆ __get_cluster_id()

◆ __get_core_irq_pending()

◆ __get_core_irq_pending_s()

◆ __get_hart_id()

◆ __get_hart_index()

◆ __get_rv_cycle()

◆ __get_rv_instret()

◆ __get_rv_time()

◆ __set_rv_cycle()

◆ __set_rv_instret()

◆ __switch_mode()