NMSIS-Core
Version 1.3.1
NMSIS-Core support for Nuclei processor-based devices
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Functions that generate RISC-V DSP SIMD instructions. More...
Modules | |
SIMD Data Processing Instructions | |
SIMD Data Processing Instructions. | |
Non-SIMD Instructions | |
Non-SIMD Instructions. | |
Partial-SIMD Data Processing Instructions | |
Partial-SIMD Data Processing Instructions. | |
64-bit Profile Instructions | |
64-bit Profile Instructions | |
RV64 Only Instructions | |
RV64 Only Instructions. | |
Nuclei Default SIMD DSP Additional Instructions | |
(RV32 & RV64)Nuclei Customized DSP Instructions | |
Nuclei N1 SIMD DSP Additional Instructions | |
(RV32 only)Nuclei Customized N1 DSP Instructions | |
Nuclei N2 SIMD DSP Additional Instructions | |
(RV32 only)Nuclei Customized N2 DSP Instructions | |
Nuclei N3 SIMD DSP Additional Instructions | |
(RV32 only)Nuclei Customized N3 DSP Instructions | |
Functions that generate RISC-V DSP SIMD instructions.
The following functions generate specified RISC-V SIMD instructions that cannot be directly accessed by compiler.
rounding
, i.e., add 1 to the most significant discarded bit for right shift or MSW-type multiplication instructions.x
.x
and y
to form a value.