NMSIS-Core
Version 1.3.1
NMSIS-Core support for Nuclei processor-based devices
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Data Fields | |
unsigned int | protection |
set locking bit, addressing mode, read, write, and instruction execution permissions, see PMP_L, PMP_R, PMP_W, PMP_X, .etc in <riscv_encoding.h> More... | |
unsigned long | order |
Size of memory region as power of 2, it has to be minimum 2 and maxium __RISCV_XLEN according to the hard-wired granularity 2^N bytes, if N = 12, then order has to be at least 12; if not, the order read out is N though you configure less than N. More... | |
unsigned long | base_addr |
Base address of memory region It must be 2^order aligned address. More... | |
Definition at line 58 of file core_feature_pmp.h.
unsigned long PMP_CONFIG::base_addr |
Base address of memory region It must be 2^order aligned address.
Definition at line 74 of file core_feature_pmp.h.
unsigned long PMP_CONFIG::order |
Size of memory region as power of 2, it has to be minimum 2 and maxium __RISCV_XLEN according to the hard-wired granularity 2^N bytes, if N = 12, then order has to be at least 12; if not, the order read out is N though you configure less than N.
Definition at line 69 of file core_feature_pmp.h.
unsigned int PMP_CONFIG::protection |
set locking bit, addressing mode, read, write, and instruction execution permissions, see PMP_L, PMP_R, PMP_W, PMP_X, .etc in <riscv_encoding.h>
Definition at line 63 of file core_feature_pmp.h.