Nndata_convert

Functions
void	riscv_q7_to_q15_no_shift (const q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
	Converts the elements of the Q7 vector to Q15 vector without left-shift. More...
void	riscv_q7_to_q15_reordered_no_shift (const q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
	Converts the elements of the Q7 vector to reordered Q15 vector without left-shift. More...
void	riscv_q7_to_q15_reordered_with_offset (const q7_t *src, q15_t *dst, uint32_t block_size, q15_t offset)
	Converts the elements of the Q7 vector to a reordered Q15 vector with an added offset. More...
void	riscv_q7_to_q7_no_shift (const q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
	Converts the elements of the Q7 vector to Q7 vector without left-shift. More...
void	riscv_q7_to_q7_reordered_no_shift (const q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
	Converts the elements of the Q7 vector to reordered Q7 vector without left-shift. More...

Detailed Description

Function Documentation

riscv_q7_to_q15_no_shift()

void riscv_q7_to_q15_no_shift	(	const q7_t *	pSrc,
		q15_t *	pDst,
		uint32_t	blockSize
	)

Converts the elements of the Q7 vector to Q15 vector without left-shift.

Converts the elements of the q7 vector to q15 vector without left-shift.

Parameters

[in]	*pSrc	points to the Q7 input vector
[out]	*pDst	points to the Q15 output vector
[in]	blockSize	length of the input vector

Description:

The equation used for the conversion process is:

        pDst[n] = (q15_t) pSrc[n];   0 <= n < blockSize.

riscv_q7_to_q15_reordered_no_shift()

void riscv_q7_to_q15_reordered_no_shift	(	const q7_t *	pSrc,
		q15_t *	pDst,
		uint32_t	blockSize
	)

Converts the elements of the Q7 vector to reordered Q15 vector without left-shift.

Converts the elements of the s8 vector to reordered q15 vector without left-shift.

Parameters

[in]	*pSrc	points to the Q7 input vector
[out]	*pDst	points to the Q15 output vector
[in]	blockSize	length of the input vector

This function does the q7 to q15 expansion with re-ordering

                         |   A1   |   A2   |   A3   |   A4   |

                          0      7 8     15 16    23 24    31

is converted into:

 |       A1       |       A3       |   and  |       A2       |       A4       |

  0             15 16            31          0             15 16            31

This looks strange but is natural considering how sign-extension is done at assembly level.

The expansion of other other oprand will follow the same rule so that the end results are the same.

The tail (i.e., last (N % 4) elements) will still be in original order.

riscv_q7_to_q15_reordered_with_offset()

void riscv_q7_to_q15_reordered_with_offset	(	const q7_t *	src,
		q15_t *	dst,
		uint32_t	block_size,
		q15_t	offset
	)

Converts the elements of the Q7 vector to a reordered Q15 vector with an added offset.

Converts the elements from a s8 vector to a s16 vector with an added offset.

Note

Refer header file for details.

riscv_q7_to_q7_no_shift()

void riscv_q7_to_q7_no_shift	(	const q7_t *	pSrc,
		q7_t *	pDst,
		uint32_t	blockSize
	)

Converts the elements of the Q7 vector to Q7 vector without left-shift.

Parameters

[in]	*pSrc	points to the Q7 input vector
[out]	*pDst	points to the Q7 output vector
[in]	blockSize	length of the input vector

Returns

none.

Description:

The equation used for the conversion process is:

        pDst[n] = (q15_t) pSrc[n];   0 <= n < blockSize.

riscv_q7_to_q7_reordered_no_shift()

void riscv_q7_to_q7_reordered_no_shift	(	const q7_t *	pSrc,
		q7_t *	pDst,
		uint32_t	blockSize
	)

Converts the elements of the Q7 vector to reordered Q7 vector without left-shift.

Parameters

[in]	*pSrc	points to the Q7 input vector
[out]	*pDst	points to the Q7 output vector
[in]	blockSize	length of the input vector

Returns

none.

This function does the q7 to q7 expansion with re-ordering

                         |   A1   |   A2   |   A3   |   A4   |

                          0      7 8     15 16    23 24    31

is converted into:

 |       A1       |       A3       |   and  |       A2       |       A4       |

  0             15 16            31          0             15 16            31

This looks strange but is natural considering how sign-extension is done at assembly level.

The expansion of other other oprand will follow the same rule so that the end results are the same.

The tail (i.e., last (N % 4) elements) will still be in original order.