NMSIS-Core  Version 1.3.1
NMSIS-Core support for Nuclei processor-based devices
riscv_bits.h
1 /*
2  * Copyright (c) 2019 Nuclei Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 #ifndef __RISCV_BITS_H__
19 #define __RISCV_BITS_H__
20 
21 #ifdef __cplusplus
22  extern "C" {
23 #endif
24 
25 #if __riscv_xlen == 64
26 # define SLL32 sllw
27 # define STORE sd
28 # define LOAD ld
29 # define LWU lwu
30 # define LOG_REGBYTES 3
31 #else
32 # define SLL32 sll
33 # define STORE sw
34 # define LOAD lw
35 # define LWU lw
36 # define LOG_REGBYTES 2
37 #endif /* __riscv_xlen */
38 
39 #define REGBYTES (1 << LOG_REGBYTES)
40 
41 #if defined(__riscv_flen)
42 #if __riscv_flen == 64
43 # define FPSTORE fsd
44 # define FPLOAD fld
45 # define LOG_FPREGBYTES 3
46 #else
47 # define FPSTORE fsw
48 # define FPLOAD flw
49 # define LOG_FPREGBYTES 2
50 #endif /* __riscv_flen == 64 */
51 #define FPREGBYTES (1 << LOG_FPREGBYTES)
52 #endif /* __riscv_flen */
53 
54 #ifdef __GNUC__
55 #define __rv_likely(x) __builtin_expect((x), 1)
56 #define __rv_unlikely(x) __builtin_expect((x), 0)
57 #else
58 #define __rv_likely(x) (x)
59 #define __rv_unlikely(x) (x)
60 #endif
61 
62 #define __RV_ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
63 #define __RV_ROUNDDOWN(a, b) ((a)/(b)*(b))
64 
65 #define __RV_MAX(a, b) ((a) > (b) ? (a) : (b))
66 #define __RV_MIN(a, b) ((a) < (b) ? (a) : (b))
67 #define __RV_CLAMP(a, lo, hi) __RV_MIN(__RV_MAX(a, lo), hi)
68 
69 #define __RV_EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
70 #define __RV_INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
71 
72 #ifdef __ASSEMBLY__
73 #define _AC(X,Y) X
74 #define _AT(T,X) X
75 #else
76 #define __AC(X,Y) (X##Y)
77 #define _AC(X,Y) __AC(X,Y)
78 #define _AT(T,X) ((T)(X))
79 #endif /* __ASSEMBLY__ */
80 
81 #define _UL(x) (_AC(x, UL))
82 #define _ULL(x) (_AC(x, ULL))
83 
84 #define _BITUL(x) (_UL(1) << (x))
85 #define _BITULL(x) (_ULL(1) << (x))
86 
87 #define UL(x) (_UL(x))
88 #define ULL(x) (_ULL(x))
89 
90 #define STR(x) XSTR(x)
91 #define XSTR(x) #x
92 #define __STR(s) #s
93 #define STRINGIFY(s) __STR(s)
94 
95 #ifdef __cplusplus
96 }
97 #endif
98 
99 #endif /* __RISCV_BITS_H__ */